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author | Eugeniy E. Mikhailov <evgmik@gmail.com> | 2022-05-31 13:39:05 -0400 |
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committer | Eugeniy E. Mikhailov <evgmik@gmail.com> | 2022-05-31 13:39:05 -0400 |
commit | dacb81b545524ccf5d5a012c8e284064fb3cced3 (patch) | |
tree | dad79ed7fa19a546c808d82984b3a49ed0f7afeb /qolab/tsdb | |
parent | fadcbdac7836579bed05f9598eb5a06654a24f9c (diff) | |
download | qolab-dacb81b545524ccf5d5a012c8e284064fb3cced3.tar.gz qolab-dacb81b545524ccf5d5a012c8e284064fb3cced3.zip |
added default resistance, to check against edge case
If Vout set to 0, it is often report negative values, which messes up
resistance estimate. So default resistance helps against such edge
cases.
Diffstat (limited to 'qolab/tsdb')
0 files changed, 0 insertions, 0 deletions