added dru and ctl files

4 files changed, 420 insertions, 0 deletions

diff --git a/phase_lock_v1.0/general_rules.ctl b/phase_lock_v1.0/general_rules.ctl
new file mode 100644
index 0000000..09475b0
--- /dev/null
+++ b/phase_lock_v1.0/general_rules.ctl
@@ -0,0 +1,136 @@
+; EAGLE Autorouter Control File
+
+[Default]
+
+  RoutingGrid     = 5mil
+
+  ; Trace Parameters:
+
+  tpViaShape      = Round
+
+  ; Preferred Directions:
+
+  PrefDir.1       = *
+  PrefDir.2       = 0
+  PrefDir.3       = 0
+  PrefDir.4       = 0
+  PrefDir.5       = 0
+  PrefDir.6       = 0
+  PrefDir.7       = 0
+  PrefDir.8       = 0
+  PrefDir.9       = 0
+  PrefDir.10      = 0
+  PrefDir.11      = 0
+  PrefDir.12      = 0
+  PrefDir.13      = 0
+  PrefDir.14      = 0
+  PrefDir.15      = 0
+  PrefDir.16      = *
+
+  Active          =    1
+  ; Cost Factors:
+
+  cfVia           =    8
+  cfNonPref       =    5
+  cfChangeDir     =    2
+  cfOrthStep      =    2
+  cfDiagStep      =    3
+  cfExtdStep      =    0
+  cfBonusStep     =    1
+  cfMalusStep     =    1
+  cfPadImpact     =    4
+  cfSmdImpact     =    4
+  cfBusImpact     =    0
+  cfHugging       =    3
+  cfAvoid         =    4
+  cfPolygon       =   10
+
+  cfBase.1        =    0
+  cfBase.2        =    1
+  cfBase.3        =    1
+  cfBase.4        =    1
+  cfBase.5        =    1
+  cfBase.6        =    1
+  cfBase.7        =    1
+  cfBase.8        =    1
+  cfBase.9        =    1
+  cfBase.10       =    1
+  cfBase.11       =    1
+  cfBase.12       =    1
+  cfBase.13       =    1
+  cfBase.14       =    1
+  cfBase.15       =    1
+  cfBase.16       =    0
+
+  ; Maximum Number of...:
+
+  mnVias          =   20
+  mnSegments      = 9999
+  mnExtdSteps     = 9999
+  mnRipupLevel    =   10
+  mnRipupSteps    =  100
+  mnRipupTotal    =  100
+
+[Follow-me]
+
+  @Route
+
+  Active          =    1
+
+[Busses]
+
+  @Route
+
+  Active          =    1
+  cfNonPref       =    4
+  cfBusImpact     =    4
+  cfHugging       =    0
+  mnVias          =    0
+
+[Route]
+
+  @Default
+
+  Active          =    1
+
+[Optimize1]
+
+  @Route
+
+  Active          =    1
+  cfVia           =   99
+  cfExtdStep      =   10
+  cfHugging       =    1
+  mnExtdSteps     =    1
+  mnRipupLevel    =    0
+
+[Optimize2]
+
+  @Optimize1
+
+  Active          =    1
+  cfNonPref       =    0
+  cfChangeDir     =    6
+  cfExtdStep      =    0
+  cfBonusStep     =    2
+  cfMalusStep     =    2
+  cfPadImpact     =    2
+  cfSmdImpact     =    2
+  cfHugging       =    0
+
+[Optimize3]
+
+  @Optimize2
+
+  Active          =    1
+  cfChangeDir     =    8
+  cfPadImpact     =    0
+  cfSmdImpact     =    0
+
+[Optimize4]
+
+  @Optimize3
+
+  Active          =    1
+  cfChangeDir     =   25
+
diff --git a/phase_lock_v1.0/normal_wires.dru b/phase_lock_v1.0/normal_wires.dru
new file mode 100644
index 0000000..96fda22
--- /dev/null
+++ b/phase_lock_v1.0/normal_wires.dru
@@ -0,0 +1,74 @@
+description[C] = <b>EAGLE Design Rules</b>\n<p>\nModified defaullt to make it suitable for fine pitch components
+description[de] = <b>EAGLE Design Rules</b>\n<p>\nDie Standard-Design-Rules sind so gewählt, dass sie für \ndie meisten Anwendungen passen. Sollte ihre Platine \nbesondere Anforderungen haben, treffen Sie die erforderlichen\nEinstellungen hier und speichern die Design Rules unter \neinem neuen Namen ab.
+description[en] = <b>EAGLE Design Rules</b>\n<p>\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.
+layerSetup = (1*16)
+mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
+mtIsolate = 1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
+mdWireWire = 20mil
+mdWirePad = 20mil
+mdWireVia = 20mil
+mdPadPad = 20mil
+mdPadVia = 50mil
+mdViaVia = 50mil
+mdSmdPad = 20mil
+mdSmdVia = 20mil
+mdSmdSmd = 20mil
+mdViaViaSameLayer = 8mil
+mnLayersViaInSmd = 2
+mdCopperDimension = 0mil
+mdDrill = 50mil
+mdSmdStop = 0mil
+msWidth = 25mil
+msDrill = 24mil
+msMicroVia = 9.99mm
+msBlindViaRatio = 0.500000
+rvPadTop = 0.250000
+rvPadInner = 0.250000
+rvPadBottom = 0.250000
+rvViaOuter = 0.250000
+rvViaInner = 0.250000
+rvMicroViaOuter = 0.250000
+rvMicroViaInner = 0.250000
+rlMinPadTop = 10mil
+rlMaxPadTop = 20mil
+rlMinPadInner = 10mil
+rlMaxPadInner = 20mil
+rlMinPadBottom = 10mil
+rlMaxPadBottom = 20mil
+rlMinViaOuter = 8mil
+rlMaxViaOuter = 20mil
+rlMinViaInner = 8mil
+rlMaxViaInner = 20mil
+rlMinMicroViaOuter = 4mil
+rlMaxMicroViaOuter = 20mil
+rlMinMicroViaInner = 4mil
+rlMaxMicroViaInner = 20mil
+psTop = -1
+psBottom = -1
+psFirst = -1
+psElongationLong = 100
+psElongationOffset = 100
+mvStopFrame = 1.000000
+mvCreamFrame = 0.000000
+mlMinStopFrame = 4mil
+mlMaxStopFrame = 4mil
+mlMinCreamFrame = 0mil
+mlMaxCreamFrame = 0mil
+mlViaStopLimit = 0mil
+srRoundness = 0.000000
+srMinRoundness = 0mil
+srMaxRoundness = 0mil
+slThermalGap = 0.500000
+slMinThermalGap = 20mil
+slMaxThermalGap = 100mil
+slAnnulusIsolate = 20mil
+slThermalIsolate = 10mil
+slAnnulusRestring = 0
+slThermalRestring = 1
+slThermalsForVias = 0
+checkGrid = 0
+checkAngle = 0
+checkFont = 1
+checkRestrict = 1
+useDiameter = 13
+maxErrors = 50
diff --git a/phase_lock_v1.0/phase_lock.dru b/phase_lock_v1.0/phase_lock.dru
new file mode 100644
index 0000000..d1fa0bc
--- /dev/null
+++ b/phase_lock_v1.0/phase_lock.dru
@@ -0,0 +1,74 @@
+description[C] = <b>EAGLE Design Rules</b>\n<p>\nModified defaullt to make it suitable for fine pitch components
+description[de] = <b>EAGLE Design Rules</b>\n<p>\nDie Standard-Design-Rules sind so gewählt, dass sie für \ndie meisten Anwendungen passen. Sollte ihre Platine \nbesondere Anforderungen haben, treffen Sie die erforderlichen\nEinstellungen hier und speichern die Design Rules unter \neinem neuen Namen ab.
+description[en] = <b>EAGLE Design Rules</b>\n<p>\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.
+layerSetup = (1*16)
+mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
+mtIsolate = 1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
+mdWireWire = 0.2mm
+mdWirePad = 0.2mm
+mdWireVia = 25mil
+mdPadPad = 0.2mm
+mdPadVia = 25mil
+mdViaVia = 25mil
+mdSmdPad = 0.0051mm
+mdSmdVia = 8mil
+mdSmdSmd = 0.0051mm
+mdViaViaSameLayer = 8mil
+mnLayersViaInSmd = 2
+mdCopperDimension = 0mil
+mdDrill = 50mil
+mdSmdStop = 0mil
+msWidth = 0.25mm
+msDrill = 24mil
+msMicroVia = 9.99mm
+msBlindViaRatio = 0.500000
+rvPadTop = 0.250000
+rvPadInner = 0.250000
+rvPadBottom = 0.250000
+rvViaOuter = 0.250000
+rvViaInner = 0.250000
+rvMicroViaOuter = 0.250000
+rvMicroViaInner = 0.250000
+rlMinPadTop = 10mil
+rlMaxPadTop = 20mil
+rlMinPadInner = 10mil
+rlMaxPadInner = 20mil
+rlMinPadBottom = 10mil
+rlMaxPadBottom = 20mil
+rlMinViaOuter = 8mil
+rlMaxViaOuter = 20mil
+rlMinViaInner = 8mil
+rlMaxViaInner = 20mil
+rlMinMicroViaOuter = 4mil
+rlMaxMicroViaOuter = 20mil
+rlMinMicroViaInner = 4mil
+rlMaxMicroViaInner = 20mil
+psTop = -1
+psBottom = -1
+psFirst = -1
+psElongationLong = 100
+psElongationOffset = 100
+mvStopFrame = 1.000000
+mvCreamFrame = 0.000000
+mlMinStopFrame = 4mil
+mlMaxStopFrame = 4mil
+mlMinCreamFrame = 0mil
+mlMaxCreamFrame = 0mil
+mlViaStopLimit = 0mil
+srRoundness = 0.000000
+srMinRoundness = 0mil
+srMaxRoundness = 0mil
+slThermalGap = 0.500000
+slMinThermalGap = 20mil
+slMaxThermalGap = 100mil
+slAnnulusIsolate = 20mil
+slThermalIsolate = 10mil
+slAnnulusRestring = 0
+slThermalRestring = 1
+slThermalsForVias = 0
+checkGrid = 0
+checkAngle = 0
+checkFont = 1
+checkRestrict = 1
+useDiameter = 13
+maxErrors = 50
diff --git a/phase_lock_v1.0/phase_lock_rules.ctl b/phase_lock_v1.0/phase_lock_rules.ctl
new file mode 100644
index 0000000..09475b0
--- /dev/null
+++ b/phase_lock_v1.0/phase_lock_rules.ctl
@@ -0,0 +1,136 @@
+; EAGLE Autorouter Control File
+
+[Default]
+
+  RoutingGrid     = 5mil
+
+  ; Trace Parameters:
+
+  tpViaShape      = Round
+
+  ; Preferred Directions:
+
+  PrefDir.1       = *
+  PrefDir.2       = 0
+  PrefDir.3       = 0
+  PrefDir.4       = 0
+  PrefDir.5       = 0
+  PrefDir.6       = 0
+  PrefDir.7       = 0
+  PrefDir.8       = 0
+  PrefDir.9       = 0
+  PrefDir.10      = 0
+  PrefDir.11      = 0
+  PrefDir.12      = 0
+  PrefDir.13      = 0
+  PrefDir.14      = 0
+  PrefDir.15      = 0
+  PrefDir.16      = *
+
+  Active          =    1
+  ; Cost Factors:
+
+  cfVia           =    8
+  cfNonPref       =    5
+  cfChangeDir     =    2
+  cfOrthStep      =    2
+  cfDiagStep      =    3
+  cfExtdStep      =    0
+  cfBonusStep     =    1
+  cfMalusStep     =    1
+  cfPadImpact     =    4
+  cfSmdImpact     =    4
+  cfBusImpact     =    0
+  cfHugging       =    3
+  cfAvoid         =    4
+  cfPolygon       =   10
+
+  cfBase.1        =    0
+  cfBase.2        =    1
+  cfBase.3        =    1
+  cfBase.4        =    1
+  cfBase.5        =    1
+  cfBase.6        =    1
+  cfBase.7        =    1
+  cfBase.8        =    1
+  cfBase.9        =    1
+  cfBase.10       =    1
+  cfBase.11       =    1
+  cfBase.12       =    1
+  cfBase.13       =    1
+  cfBase.14       =    1
+  cfBase.15       =    1
+  cfBase.16       =    0
+
+  ; Maximum Number of...:
+
+  mnVias          =   20
+  mnSegments      = 9999
+  mnExtdSteps     = 9999
+  mnRipupLevel    =   10
+  mnRipupSteps    =  100
+  mnRipupTotal    =  100
+
+[Follow-me]
+
+  @Route
+
+  Active          =    1
+
+[Busses]
+
+  @Route
+
+  Active          =    1
+  cfNonPref       =    4
+  cfBusImpact     =    4
+  cfHugging       =    0
+  mnVias          =    0
+
+[Route]
+
+  @Default
+
+  Active          =    1
+
+[Optimize1]
+
+  @Route
+
+  Active          =    1
+  cfVia           =   99
+  cfExtdStep      =   10
+  cfHugging       =    1
+  mnExtdSteps     =    1
+  mnRipupLevel    =    0
+
+[Optimize2]
+
+  @Optimize1
+
+  Active          =    1
+  cfNonPref       =    0
+  cfChangeDir     =    6
+  cfExtdStep      =    0
+  cfBonusStep     =    2
+  cfMalusStep     =    2
+  cfPadImpact     =    2
+  cfSmdImpact     =    2
+  cfHugging       =    0
+
+[Optimize3]
+
+  @Optimize2
+
+  Active          =    1
+  cfChangeDir     =    8
+  cfPadImpact     =    0
+  cfSmdImpact     =    0
+
+[Optimize4]
+
+  @Optimize3
+
+  Active          =    1
+  cfChangeDir     =   25
+