added default resistance, to check against edge case

If Vout set to 0, it is often report negative values, which messes up
resistance estimate. So default resistance helps against such edge
cases.

1 files changed, 5 insertions, 1 deletions

diff --git a/qolab/hardware/power_supply/keysight_e3612a.py b/qolab/hardware/power_supply/keysight_e3612a.py
index 6793088..cb0b5de 100644
--- a/qolab/hardware/power_supply/keysight_e3612a.py
+++ b/qolab/hardware/power_supply/keysight_e3612a.py
@@ -11,6 +11,7 @@ class KeysightE3612A(PowerSupplySCPI):
         self.numberOfChannels = 3
         self.deviceProperties = {'OpMode', };
         self.channelProperties = {'IsOn', 'Regulation', 'Vout', 'Vlimit', 'Iout', 'Ilimit', 'dV', 'dI', }
+        self.deffaultChannelR = 47; # used if no empirical way to calculate it via Vout/Iout
 
     def getChandV(self, chNum):
         """
@@ -141,7 +142,10 @@ class KeysightE3612A(PowerSupplySCPI):
                 Vo = vLimit - vOut
             else:
                 Vo=0
-            R=vOut/iOut
+            if (iOut == 0) or (vOut <= 0.001): # when vOut set to 0 the numbers are misreported
+                R = self.deffaultChannelR # some default
+            else:
+                R=vOut/iOut
             vDesired = R*iDesired
             self.setChanVlimit(chNum, vDesired+Vo)
             time.sleep(dwellTime)